1. Field of the Invention
The invention relates to a process for joining substrates in general and for joining substrates having electrical, semiconducting, mechanical and/or optical components and to a composite element, in particular.
2. Description of Related Art
Joining techniques are used for a wide range of technical fields. By way of example, at this point reference may be made of the formation of housings for electronic components by means of which, for example, electronic circuits are enclosed.
For example, there are known processes in which components or integrated circuits on a semiconductor chip or still joined to a semiconductor wafer are provided with a housing and with electrical connection contacts. If the mounting of the chip or the integrated circuit and the joining of contact regions of the chip to the housing contacts which lead to the outside are carried out while it is still joined to the wafer, a mounting method of this type is generally referred to as a wafer level packaging process. It is also known to encapsulate individual chips or dies, known as single die packaging.
These processes are used to adhesively bond components, for example, using epoxy resins. However, a drawback of adhesive bonding is a low chemical resistance, poor optical properties and the risk of components being soiled with adhesive. Furthermore, adhesion locations are subject to an aging process which is accompanied by a deterioration in the quality of the join.
The fundamentally known joining techniques or processes also include what is known as bonding. A particular type of bonding is what is known as anodic bonding, in which a voltage is applied to an interface under the action of heat, which forces charge carrier diffusion.
Although bonding processes have a number of advantages over epoxy adhesive joining, their application is very restricted, making them inflexible.
By way of example, anodic bonding is disadvantageously restricted to a very tightly limited number of materials, since the charge carriers have to be provided in the material. For example, anodic bonding typically requires materials which contain alkaline metals. Therefore, anodic bonding is not suitable for a wide range of applications. The same is also true of other bonding processes.
Furthermore, bonding processes do not involve any build-up and consequently, they have hitherto only been suitable for plane-parallel connections. This too considerably restricts the range of applications.
Document EP 0 280 905 describes a process for producing pressure sensors in which a borosilicate glass layer is formed on a silicon wafer. The glass layer is described as a matrix which covers the corresponding sensor chips and a conductive layer. However, the borosilicate glass layer is formed by sputtering on the surface of the silicon sensor wafer. It is fundamentally difficult and expensive to produce relatively great layer thicknesses by sputtering. Although a layer thickness of 5 μm is mentioned, when using the sputtering process this is typically associated with considerable heating of the substrate, which can cause further difficulties.
Document U.S. Pat. No. 5,825,233 describes a microhousing for infrared chips, in which a layer of soldering agent is applied by vacuum deposition and lift-off technique or etching or by a mask. However, a soldering agent brings with it the risk of contamination.
The document “Anodic Bonding Technique under Low-temperature and Low-voltage using Evaporated Glass” by Woo-Beom Choi, 9th International Vacuum Microelectronics Conference, St. Petersburg, 1996 describes a process in which a glass layer is applied to a silicon wafer by electron beam evaporation. However, the application of this process is limited.
In any event, there is still a considerable need for versatile and improved joining processes.